The present invention relates to computer memory protection, and more particularly to nonvolatile memory protection which prevents data errors when a microprocessor executes erroneous instructions during normal operations and during power up and power down.
A nonvolatile memory, as shown in FIG. 1, has two components, a random access memory (RAM) which acts upon every command received and an electrically erasable programmable read only memory (E.sub.2 PROM) which can accept only a limited number of WRITEs to the E.sub.2 PROM portion until it will no longer retain data when power is removed. During microprocessor execution of software code it is possible for spurious commands to be generated which cause erroneous WRITEs to the E.sub.2 PROM portion of the nonvolatile memory, either randomly or in a continuous stream. Such erroneous WRITEs can destroy the E.sub.2 PROM portion of the nonvolatile memory, rendering it useless. Another source of spurious microprocessor commands which may cause erroneous writes to the nonvolatile memory is the power supply. During power up or down of the microprocessor system not all parts of the system are powered up or down instantaneously together, providing the opportunity for spurious commands either while the system is powering up or down.
What is desired is a method for protecting the nonvolatile memory from such spurious commands to maintain the integrity of the data in the memory.